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Academic Report: Intel Code Modernization Partner




     Topic : Intel Code Modernization Partner


Time: 14:30-16:00pm, Sep. 28th (Thursday), 2017

Venue: 102, Third Teaching Building, East Campus

Lecturer: Zhifang Song

About the lecturer: Mr. Zhifang Song is the Senior System Engineer and Lecturer of Beijing PARATERA Tech Corp.,Ltd.  He graduated from Computer Schoolof National University of Defense Technology and is experienced in mixed programming, MPI optimization and other parallel optimization techniques. He had conducted different levels of optimization on domestic self-developed software — geophysical software GeoEast and air dynamics "wind and thunder" , thus accumulating multi-industry application optimization experiences.   

About the Lecture:Intel was launching a code modernization training program Intel Code Modernization Partner (short for CMP) around the world. It aimed to train and find more excellent code modernization talents for compiling and optimizing in the field of HPC through cooperation with leading enterprises and authoritative experts from various countries. Through on-site demonstration, it can make more R & D personnel make full use of code compilation optimization tool including Parallel Studio, make the Intel Xeon/Xeon Phi platform play the greatest potential, and also promote the development of HPC industry.

The main contents of the lecture:

1 Introduce the Intel Xeon Phi processor, including the development trend of Intel framework, a brief introduction of index parameter, and matching equipment of Knights Landing processor.

2 Introduce the processor architecture of Intel Xeon Phi, mainly about its chip architecture and core architecture, and improvement of KNL single core processing technology from hardware processing power;

3 Introduce the parallel optimization techniques that can be used in Intel Xeon Phi processor architectures holistically and potential code modernization improvements.

4 Introduce the concept and realization method of vector quantization in detail according to the 512 bit vector processing bandwidth of KNL;

5 Introduce the unique memory structure of KNL, mainly about the characteristics and usage of its high bandwidth memory;

6 Introduce different cluster modes divided in terms of the uses of KNL core structure, and the parallel implementation that could be used under cluster mode.

All teachers and students are welcome!   

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